HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 562

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 18 ROM (128 kB Version)
18.2.4
Emulation should be performed in user mode or user program mode. When the emulation block
set in RAMER is accessed while the emulation function is being executed, data written in the
overlap RAM is read.
User Mode
Rev. 5.00 Jan 06, 2006 page 540 of 818
REJ09B0273-0500
User Program Mode
When overlap RAM data is confirmed, the RAMS bit is cleared, RAM overlap is released, and
writes should actually be performed to the flash memory.
When the programming control program is transferred to RAM, ensure that the transfer
destination and the overlap RAM do not overlap, as this will cause data in the overlap RAM to
be rewritten.
Flash Memory Emulation in RAM
Application program
Emulation block
Execution state
Flash memory
(emulation is performed
on data written in RAM)
Overlap RAM
RAM
SCI

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