HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 623

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 0—Program 2 (P2): Selects program mode transition or clearing (applicable addresses:
H'20000 to H'3FFFF). Do not set the ESU2, PSU2, EV2, PV2, or E2 bit at the same time.
19.5.3
EBR1 is an 8-bit register that specifies the flash memory erase area block by block. EBR1 is
initialized to H'00 by a reset, in hardware standby mode and software standby mode, when a low
level is input to the FWE pin, and when a high level is input to the FWE pin and the SWE bit in
FLMCR1 is not set. When a bit in EBR1 is set to 1, the corresponding block can be erased. Other
blocks are erase-protected. Only one of the bits of EBR1 and EBR2 combined can be set. Do not
set more than one bit. When on-chip flash memory is disabled, a read will return H'00, and writes
are invalid.
The flash memory block configuration is shown in table 19.3.
Bit 0:
P2
0
1
Initial value:
Erase Block Register 1 (EBR1)
Description
Program mode cleared
Transition to program mode
[Setting condition]
When FWE = 1, SWE = 1, and PSU2 = 1
R/W:
Bit:
—
R
7
0
—
R
6
0
—
R
5
0
—
R
4
0
Rev. 5.00 Jan 06, 2006 page 601 of 818
R/W
EB3
Section 19 ROM (256 kB Version)
3
0
R/W
EB2
2
0
REJ09B0273-0500
R/W
EB1
1
0
(Initial value)
R/W
EB0
0
0