HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 547

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

17.5.1
The port D register is shown in table 17.7.
Table 17.7 Port D Register
Note: A register access is performed in two cycles regardless of the access size.
17.5.2
The port D data register (PDDR) is a 16-bit readable/writable register that stores port D data. Bits
PD15DR to PD0DR correspond to pins PD15/D15 to PD0/D0.
When a pin functions as a general output, if a value is written to PDDR, that value is output
directly from the pin, and if PDDR is read, the register value is returned directly regardless of the
pin state. When the POD pin is driven low, general outputs go to the high-impedance state
regardless of the PDDR value. When the POD pin is driven high, the written value is output from
the pin.
When a pin functions as a general input, if PDDR is read the pin state, not the register value, is
returned directly. If a value is written to PDDR, although that value is written into PDDR it does
not affect the pin state. Table 17.8 summarizes port D data register read/write operations.
PDDR is initialized by a power-on reset (excluding a WDT power-on reset), and in hardware
standby mode. It is not initialized in software standby mode or sleep mode.
Name
Port D data register
Initial value:
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit:
Register Configuration
Port D Data Register (PDDR)
PD15
DR
15
0
PD14
DR
14
0
PD13
DR
13
0
Abbreviation
PDDR
PD12
DR
12
0
PD11
DR
11
0
PD10
DR
10
0
R/W
R/W
PD9
DR
9
0
PD8
DR
8
0
Initial Value
H'0000
PD7
DR
Rev. 5.00 Jan 06, 2006 page 525 of 818
7
0
PD6
DR
6
0
PD5
DR
5
0
Address
H'FFFF8398
Section 17 I/O Ports (I/O)
PD4
DR
4
0
PD3
DR
3
0
REJ09B0273-0500
PD2
DR
2
0
Access Size
8, 16
PD1
DR
1
0
PD0
DR
0
0