HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 5
![MCU 5V 256K J-TEMP PB-FREE QFP-1](/photos/28/62/286212/168-bqfp_sml.jpg)
HD64F7051SFJ20V
Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet
1.HD64F7050SFJ20V.pdf
(843 pages)
Specifications of HD64F7051SFJ20V
Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
- Current page: 5 of 843
- Download datasheet (5Mb)
Preface
The SH7050 series (SH7050, SH7051) is a single-chip RISC microcontroller that integrates a
RISC CPU core using an original Renesas architecture with peripheral functions required for
system configuration.
The CPU has a RISC-type instruction set. Most instructions can be executed in one state (one
system clock cycle), which greatly improves instruction execution speed. In addition, the 32-bit
internal architecture enhances data processing power. With this CPU, it has become possible to
assemble low-cost, high-performance/high-functionality systems even for applications such as
real-time control, which could not previously be handled by microcontrollers because of their
high-speed processing requirements.
In addition, the SH7050 series includes on-chip peripheral functions necessary for synchronous
configuration, such as large-capacity ROM and RAM, a direct memory access controller
(DMAC), timers, a serial communication interface (SCI), A/D converter, interrupt controller
(INTC), and I/O ports.
ROM and SRAM can be directly connected by means of an external memory access support
function, greatly reducing system cost.
There are versions of on-chip ROM: mask ROM and flash memory. The flash memory can be
programmed with a programmer that supports SH7050 series programming, and can also be
programmed and erased by software.
This hardware manual describes the SH7050 series hardware. Refer to the programming manual
for a detailed description of the instruction set.
Related Manual
SH7050 series instructions
SH-1/SH-2/SH-DSP Software Manual (Document No. REJ09B0171-0500O)
Please consult your Renesas sales representative for details of development environment system.
Rev. 5.00 Jan 06, 2006 page iii of xx
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