HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 143

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

8.2.4
WCR2 is a 16-bit read/write register that specifies the number of access cycles for DRAM space
and CS space for DMA single address mode transfers.
Do not perform any DMA single address transfers before WCR2 is set.
WCR2 is initialized by a power-on reset and in hardware standby mode to H'000F. It is not
initialized by software standby mode.
Bits 15–4—Reserved: These bits always read as 0. The write value should always be 0.
Bits 3–0—CS Space DMA Single Address Mode Access Wait Specification (DSW3, DSW2,
DSW1, DSW0): Specifies the number of waits for CS space access (0–15) during DMA single
address mode accesses. These bits are independent of the W bits of the WCR1.
Bit 3:
DSW3
0
0
1
Initial value:
Initial value:
Wait Control Register 2 (WCR2)
Bit 2:
DSW2
0
0
1
R/W:
R/W:
Bit:
Bit:
Bit 1:
DSW1
0
0
1
15
—
—
R
R
0
7
0
Bit 0:
DSW0
0
1
1
14
—
—
R
R
0
6
0
Description
No wait (external wait input disabled)
1 wait (external wait input enabled)
15 wait (external wait input enabled) (initial value)
13
—
—
R
R
0
5
0
12
—
—
R
R
0
4
0
Rev. 5.00 Jan 06, 2006 page 121 of 818
Section 8 Bus State Controller (BSC)
DSW3
R/W
11
—
R
0
3
1
DSW2
R/W
10
—
R
0
2
1
REJ09B0273-0500
DSW1
R/W
—
R
9
0
1
1
DSW0
R/W
—
R
8
0
0
1