HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 321

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
10.3.12 Offset One-Shot Pulse Function Pulse Output Timing
There is a delay of one CK state between the occurrence of a compare-match between the channel
1 or 2 free-running counter (TCNT) and a general register (GR), and setting of the channel 10
down-count start flag (DST) is set. In addition, there is a maximum delay of one DCNT input
clock count clock cycle between setting of the DST flag and the start of the DCNT count. One-
shot pulse output varies by a further delay of one CK state, but there is no error in the one-shot
pulse output pulse width.
Figure 10.24 shows an example with an offset width setting of H'0100, and a pulse width setting
of H'0003.
Internal write signal
DCNT input clock
Down-count start
One-shot pulse
flag DST
Figure 10.23 One-Shot Pulse Function Pulse Output Timing
DCNT
output
CK
1 written
to DST
H'0005
DCNT start delay
1 state
H'0004
H'0003
Rev. 5.00 Jan 06, 2006 page 299 of 818
Section 10 Advanced Timer Unit (ATU)
H'0002
H'0001
H'0000 H'0000
REJ09B0273-0500
1 state

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