HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 283

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Bit 0—Input Capture/Compare-Match Interrupt Enable (IME5A): Enables or disables
interrupt requests by IMF5A in TSR when IMF5A is set to 1.
Timer Interrupt Enable Register E (TIERE)
TIERE controls enabling/disabling of channel 6 to 9 cycle register compare interrupt requests.
Bit 7—Reserved: This bit is always read as 0, and should only be written with 0.
Bit 6—Cycle Register Compare-Match Interrupt Enable (CME6): Enables or disables
interrupt requests by CMF6 in TSR when CMF6 is set to 1.
Bit 5—Reserved: This bit is always read as 0, and should only be written with 0.
Bit 4—Cycle Register Compare-Match Interrupt Enable (CME7): Enables or disables
interrupt requests by CMF7 in TSR when CMF7 is set to 1.
Bit 3—Reserved: This bit is always read as 0, and should only be written with 0.
Bit 0:
IME5A
0
1
Bit 6:
CME6
0
1
Bit 4:
OME7
0
1
Initial value:
Description
IMI5A interrupt requested by IMF5A is disabled
IMI5A interrupt requested by IMF5A is enabled
Description
CMI6 interrupt requested by CMF6 is disabled
CMI6 interrupt requested by CMF6 is enabled
Description
CMI7 interrupt requested by CMF7 is disabled
CMI7 interrupt requested by CMF7 is enabled
R/W:
Bit:
R
7
0
CME6
R/W
6
0
R
5
0
CME7
R/W
4
0
Rev. 5.00 Jan 06, 2006 page 261 of 818
Section 10 Advanced Timer Unit (ATU)
R
3
0
CME8
R/W
2
0
REJ09B0273-0500
R
1
0
(Initial value)
(Initial value)
(Initial value)
CME9
R/W
0
0

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