HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 257

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.2.7
The timer status registers (TSR) are 8-bit registers. The ATU has eight TSR registers: two for
channel 0, one each for channels 1 and 2, two for channels 3 to 5, one for channels 6 to 9, and one
for channel 10.
The TSR registers are 8-bit readable/writable registers containing flags that indicate free-running
counter (TCNT) overflow, channel 0 input capture or interval interrupt generation, general register
input capture or compare-match, channel 6 to 9 compare-matches, down-counter underflow.
Each flag is an interrupt source, and issues an interrupt request to the CPU if the interrupt is
enabled by the corresponding bit in the timer interrupt enable register (TIER).
Each TSR is initialized to H'00 by a power-on reset, and in hardware standby mode and software
standby mode.
Channel
0
1
2
3
4
5
6
7
8
9
10
Timer Status Registers (TSR)
Abbreviation
TSRAH, TSRAL
TSRB
TSRC
TSRDH, TSRDL
TSRE
TSRF
Function
Indicates input capture, compare-match, and overflow status
Indicates cycle register compare-match status
Indicates down-counter underflow status.
Indicates input capture, interval interrupt, and overflow status.
Indicates input capture, compare-match, and overflow status.
Rev. 5.00 Jan 06, 2006 page 235 of 818
Section 10 Advanced Timer Unit (ATU)
REJ09B0273-0500