HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 468

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 14 A/D Converter
14.2.6
The A/D trigger register (ADTRGR) is an 8-bit readable/writable register that selects the A/D0
trigger. Either external pin (ADTRG) or ATU (ATU interval timer interrupt) triggering can be
selected.
ADTRGR is initialized to H'FF by a power-on reset, and in hardware standby mode and software
standby mode.
Bit 7—Trigger Enable (EXTRG): Selects external pin input (ADTRG) or the ATU interval
timer interrupt.
Bit 7:
EXTRGA
0
1
Bits 6 to 0—Reserved: These bits are always read as 1, and should only be written with 1.
In order to select external triggering or ATU triggering, the TGRE bit in ADCR0 must be set to 1.
For details, see section 14.2.3, A/D Control Register 0.
Rev. 5.00 Jan 06, 2006 page 446 of 818
REJ09B0273-0500
Initial value:
A/D Trigger Register (ADTRGR)
Description
A/D conversion is triggered by the ATU channel 0 interval timer interrupt
A/D conversion is triggered by external pin input (ADTRG)
R/W:
Bit:
EXTRG
R/W
7
1
R
6
1
R
5
1
R
4
1
R
3
1
R
2
1
R
1
1
(Initial value)
R
0
1

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