HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 337

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
10.5.3
The timer control register (TCR), timer I/O control registers 1 to 5 (TIOR1 to TIOR5), and the
timer connection register (TCNR) are 8-bit registers. These registers are connected to the upper 8
bits or lower 8 bits of the internal 16-bit data bus, and can be read or written a byte at a time.
In addition, a pair of 8-bit registers for which only the least significant bit of the address is
different, such as timer I/O control register 4A (TIOR4A) and timer I/O control register 4B
(TIOR4B), can be read or written in combination a word at a time.
Figures 10.40 and 10.41 show the operation when performing individual byte read or write
accesses to TIOR4A and TIOR4B. Figure 10.42 shows the operation when performing a word
read or write access to TIOR4A and TIOR4B simultaneously.
CPU
CPU
CPU
8-Bit or 16-Bit Accessible Registers
Only upper 8 bits used
Only lower 8 bits used
Figure 10.42 Word Read/Write Access to TIOR4A and TIOR4B
Internal data bus
Internal data bus
Internal data bus
Figure 10.40 Byte Read/Write Access to TIOR4A
Figure 10.41 Byte Read/Write Access to TIOR4B
interface
interface
interface
Bus
Bus
Bus
Only upper 8 bits used
Only lower 8 bits used
Rev. 5.00 Jan 06, 2006 page 315 of 818
Module data bus
Module data bus
Module data bus
Section 10 Advanced Timer Unit (ATU)
REJ09B0273-0500
TIOR4A
TIOR4A
TIOR4A
TIOR4B
TIOR4B
TIOR4B

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