HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 395

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

13.2
13.2.1
The receive shift register (RSR) receives serial data. Data input at the RxD pin is loaded into the
RSR in the order received, LSB (bit 0) first, converting the data to parallel form. When one byte
has been received, it is automatically transferred to the RDR.
The CPU cannot read or write the RSR directly.
13.2.2
The receive data register (RDR) stores serial receive data. The SCI completes the reception of one
byte of serial data by moving the received data from the receive shift register (RSR) into the RDR
for storage. The RSR is then ready to receive the next data. This double buffering allows the SCI
to receive data continuously.
The CPU can read but not write the RDR. The RDR is initialized to H'00 by a power-on reset, in
hardware standby mode and software standby mode.
Initial value:
Register Descriptions
Receive Shift Register (RSR)
Receive Data Register (RDR)
R/W:
R/W:
Bit:
Bit:
—
R
7
7
0
—
R
6
6
0
—
R
5
5
0
Section 13 Serial Communication Interface (SCI)
—
R
4
4
0
Rev. 5.00 Jan 06, 2006 page 373 of 818
—
R
3
3
0
—
R
2
2
0
REJ09B0273-0500
—
R
1
1
0
—
R
0
0
0