HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 352

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 Advanced Timer Unit (ATU)
Contention between GR Write and Data Transfer by Input Capture: If input capture occurs
in the T2 state of a CPU write cycle for a channel 1 to 5 general register (GR1A to GR1F, GR2A,
GR2B, GR3A to GR3D, GR4A to GR4D, GR5A, GR5B), the write to TCNT has priority and the
data transfer to GR is not performed.
Writing of 1 to the interrupt status flag due to input capture is performed in the same way as for
normal input capture.
The timing in this case is shown in figure 10.54.
T1
T2
CK
Address
GR address
Internal write signal
Internal input capture signal
CPU write value
GR
Interrupt status flag
Figure 10.54 Contention between GR Write and Data Transfer by Input Capture
Rev. 5.00 Jan 06, 2006 page 330 of 818
REJ09B0273-0500