HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 751

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Note:
Timer Status Register C (TSRC)
Bit
2
1
0
Initial value:
* Only 0 can be written to clear the flag.
Bit name:
Bit Name
Overflow flag (OVF2)
Input capture/compare
match flag (IMF2B)
Input capture/compare
match flag (IMF2A)
R/W:
Bit:
—
R
7
0
—
R
6
0
Value
0
1
0
1
0
1
—
R
5
0
H'FFFF82C9 (Channel 2)
Appendix A On-Chip Supporting Module Registers
Description
Read OVF2 when OVF2 =1, then write 0 in OVF2
[Setting condition]
TCNT2 overflowed from H'FFFF to H'0000
[Clearing condition]
Read IMF2B when IMF2B =1, then write 0 in
IMF2B
[Setting conditions]
1. TCNT2 value is transferred to GR2B by an
2. TCNT2 = GR2B when GR2B functions as an
[Clearing condition]
Read IMF2A when IMF2A =1, then write 0 in
IMF2A
[Setting conditions]
1. TCNT2 value is transferred to GR2A by an
2. TCNT2 = GR2A when GR2A functions as an
[Clearing condition]
input capture signal when GR2B functions as
an input capture register
output compare register
input capture signal when GR2A functions as
an input capture register
output compare register
—
R
4
0
Rev. 5.00 Jan 06, 2006 page 729 of 818
—
R
3
0
R/(W) *
OVF2
2
0
8
REJ09B0273-0500
R/(W) *
IMF2B
1
0
(Initial value)
(Initial value)
(Initial value)
R/(W) *
IMF2A
0
0
ATU