HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 616

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 19 ROM (256 kB Version)
19.4
The registers used to control the on-chip flash memory when enabled are shown in table 19.2.
Table 19.2 Flash Memory Registers
Register Name
Flash memory control
register 1
Flash memory control
register 2
Erase block register 2
RAM emulation register
Notes: FLMCR1, FLMCR2, EBR1, and EBR2 are 8-bit registers, and RAMER is a 16-bit register.
Rev. 5.00 Jan 06, 2006 page 594 of 818
REJ09B0273-0500
Erase block register 1
Only byte accesses are valid for FLMCR1, FLMCR2, EBR1, and EBR2, the access
requiring 3 cycles. Three cycles are required for a byte or word access to RAMER, and 6
cycles for a longword access.
When a longword write is performed on RAMER, 0 must always be written to the lower
word (address H'FFFF8630). Operation is not guaranteed if any other value is written.
1. In modes in which the on-chip flash memory is disabled, a read will return H'00, and
2. When a high level is input to the FWE pin, the initial value is H'80.
3. When a low level is input to the FWE pin, or if a high level is input and the SWE bit in
Register Configuration
writes are invalid. Writes are also disabled when the FWE bit is set to 1 in FLMCR1.
FLMCR1 is not set, these registers are initialized to H'00.
Abbreviation
FLMCR1
FLMCR2
EBR1
EBR2
RAMER
R/W *
R/W *
R/W
R/W
R/W *
R/W *
1
1
1
1
Initial Value
H'00 *
H'00 *
H'00 *
H'00 *
H'0000
2
3
3
3
Address
H'FFFF8580
H'FFFF8581
H'FFFF8582
H'FFFF8583
H'FFFF8628
Access Size
8
8
8
8
8, 16, 32