UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 239
UPD78F1506GF-GAT-AX
Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet
1.UPD78F1500GK-GAK-AX.pdf
(1016 pages)
Specifications of UPD78F1506GF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 239 of 1016
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78K0R/Lx3
5.6 Controlling Clock
5.6.1 Example of controlling high-speed system clock
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
The following two types of high-speed system clocks are available.
• X1 clock:
• External main system clock: External clock is input to the EXCLK pin.
When the high-speed system clock is not used, the X1/P121 and X2/EXCLK/P122 pins can be used as input port pins.
Caution The X1/P121 and X2/EXCLK/P122 pins are in the input port mode after a reset release.
The following describes examples of setting procedures for the following cases.
(1) When oscillating X1 clock
(2) When using external main system clock
(3) When using high-speed system clock as CPU/peripheral hardware clock
(4) When stopping high-speed system clock
(1) Example of setting procedure when oscillating the X1 clock
<1> Setting P121/X1 and P122/X2/EXCLK pins and setting oscillation frequency (CMC register)
<2> Controlling oscillation of X1 clock (CSC register)
<3> Waiting for the stabilization of the oscillation of X1 clock
Cautions 1. The CMC register can be written only once after reset release, by an 8-bit memory
• 2 MHz ≤ f
• 10 MHz < f
Remarks 1. f
If MSTOP is cleared to 0, the X1 oscillator starts oscillating.
Check the OSTC register and wait for the necessary time.
During the wait time, other software processing can be executed with the internal high-speed oscillation clock.
EXCLK
EXCLK
2. Set the X1 clock after the supply voltage has reached the operable voltage of the clock to be
0
0
manipulation instruction.
Therefore, it is necessary to also set the value of the OSCSELS bit at the same time. For
OSCSELS bit, see 5.6.3 Example of controlling subsystem clock.
used (see CHAPTER 31 ELECTRICAL SPECIFICATIONS).
2. For setting of the P123/XT1 and P124/XT2 pins, see 5.6.3
X
X
≤ 10 MHz
OSCSEL
OSCSEL
subsystem clock.
X
≤ 20 MHz
: X1 clock oscillation frequency
1
1
Crystal/ceramic resonator is connected to the X1 and X2 pins.
0
0
0
0
OSCSELS
OSCSELS
0/1
0/1
0
0
0
0
AMPHS1
AMPHS1
0/1
0/1
CHAPTER 5 CLOCK GENERATOR
AMPHS0
AMPHS0
0/1
0/1
Example of controlling
AMPH
AMPH
0
1
239
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