UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 571

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
<R>
78K0R/Lx3
14.7.5 Calculating transfer rate
register mn (SMRmn).
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
The transfer rate for simplified I
The operation clock (MCK) is determined by serial clock select register m (SPSm) and bit 15 (CKSmn) of serial mode
(Transfer rate) = {Operation clock (MCK) frequency of target channel} ÷ (SDRmn[15:9] + 1) ÷ 2
Caution Setting SDRmn [15:9] = 0000000B is prohibited. Set SDRmn[15:9] to 0000001B or greater.
Remarks 1. The value of SDRmn[15:9] is the value of bits 15 to 9 of the SDRmn register (0000000B to
2. m: Unit number (m = 0, 1), n: Channel number (n = 0, 2)
1111111B) and therefore is 0 to 127.
Figure 14-99. Flowchart of Stop Condition Generation
2
C (IIC10, IIC20) communication can be calculated by the following expressions.
Writing 1 to STmn bit to clear
Starting generation of stop condition.
transmission/data reception
End of IIC communication
Writing 1 to CKOmn bit
Writing 0 to SOEmn bit
Writing 0 to SOmn bit
Writing 1 to SOmn bit
Completion of data
SEmn to 0.
Wait
Secure a wait time so that the specifications of
I
2
C on the slave side are satisfied.
CHAPTER 14 SERIAL ARRAY UNIT
571

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