UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 420

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
<R>
78K0R/Lx3
(5) ANI0 to ANI10, ANI15
(6) Input impedance of ANI0 to ANI10, ANI15 pins
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Remark 78K0R/LF3:
<1> The analog input pins (ANI0 to ANI7) are also used as input port pins (P20 to P27).
<2> If the pins adjacent to the pins currently used for A/D conversion are used as digital I/O port, the expected value
<3> If any pin among pins of ports 2 and 15 is used as digital output port during A/D conversion, the expected value
This A/D converter charges a sampling capacitor for sampling during sampling time.
Therefore, only a leakage current flows when sampling is not in progress, and a current that charges the capacitor
flows during sampling. Consequently, the input impedance fluctuates depending on whether sampling is in progress,
and on the other states.
To make sure that sampling is effective, however, it is recommended to keep the output impedance of the analog
input source to within 1 kΩ, and to connect a capacitor of about 100 pF to the ANI0 to ANI10 and ANI15 pins (see
Figure 10-26).
Reference
C = 100 to 1,000 pF
voltage
The analog input pins (ANI8 to ANI10, ANI15) are also used as input port pins (P150 to P152, P157).
When A/D conversion is performed with any of ANI0 to ANI10, and ANI15 selected, do not access P20 to P27,
P150 to P152, and P157 while conversion is in progress; otherwise the conversion resolution may be degraded.
It is recommended to select pins used as P20 to P27, P150 to P152, and P157 starting with the ANI0/P20 that
is the furthest from AV
of the A/D conversion may not be obtained due to coupling noise. Therefore, make sure that digital pulses are
not input to or output from the pins adjacent to the pin undergoing A/D conversion.
of the A/D conversion may not be obtained due to coupling noise. Therefore, make sure that digital pulses are
not output to pins of ports 2 and 15 during A/D conversion.
input
78K0R/LG3, 78K0R/LH3:
DD0
.
Figure 10-26. Analog Input Pin Connection
ANI0-ANI6, ANI15
ANI0-ANI10, ANI15
AV
ANI0 to ANI10, ANI15
AV
V
SS
REFP
SS
If there is a possibility that noise equal to or higher than AV
equal to or lower than AV
small V
F
value (0.3 V or lower).
SS
may enter, clamp with a diode with a
CHAPTER 10 A/D CONVERTER
DD0
or
420

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