UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 651

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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78K0R/Lx3
15.6 Timing Charts
devices as its communication partner.
which specifies the data transfer direction, and then starts serial communication with the slave device.
transmit data is transferred to the SO latch and is output (MSB first) via the SDA0 pin.
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
When using the I
After outputting the slave address, the master device transmits the TRC bit (bit 3 of the IICA status register (IICS)),
Figures 15-32 and 15-33 show timing charts of the data communication.
The IICA shift register (IICA)’s shift operation is synchronized with the falling edge of the serial clock (SCL0). The
Data input via the SDA0 pin is captured into IICA at the rising edge of SCL0.
2
C bus mode, the master device outputs an address via the serial bus to select one of several slave
CHAPTER 15 SERIAL INTERFACE IICA
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