UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 389

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
9.2 Configuration of Clock Output/Buzzer Output Controller
9.3 Registers Controlling Clock Output/Buzzer Output Controller
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
The clock output/buzzer output controller includes the following hardware.
The following two registers are used to control the clock output/buzzer output controller.
• Clock output select registers 0, 1 (CKS0, CSK1)
• Port mode register 3 (PM3)
(1) Clock output select registers 0, 1 (CKS0, CKS1)
These registers set output enable/disable for clock output or for the buzzer frequency output pin
(PCLBUZ0/PCLBUZ1), and set the output clock.
Select the clock to be output from PCLBUZ0 by using CKS0.
Select the clock to be output from PCLBUZ1 by using CKS1.
CKS0 and CKS1 are set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
Control registers
Table 9-1. Configuration of Clock Output/Buzzer Output Controller
Item
CHAPTER 9 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
Clock output select registers 0, 1 (CKS0, CKS1)
Port mode register 3 (PM3)
Port register 3 (P3)
Configuration
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