UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 908

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
78K0R/Lx3
(2) Serial interface: Serial array unit (3/18)
Notes 1.
Caution Select the normal input buffer for SIp and SCKp and the normal output mode for SOp by using the PIMg
Remarks 1.
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
SCKp cycle time
SCKp high-/low-level width
SIp setup time
(to SCKp↑)
SIp hold time
(from SCKp↑)
Delay time from SCKp↓ to
SOp output
(T
(c) During communication at same potential (CSI mode) (slave mode, SCKp... external clock input)
A
2.
3.
4.
= −40 to +85°C, 1.8 V ≤ V
Parameter
2.
and POMx registers.
Note 1
Note 3
When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp setup time becomes “to SCKp↓”
when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp hold time becomes “from
SCKp↓” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The delay time to SOp output becomes
“from SCKp↑” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
C is the load capacitance of the SCKp and SOp output lines.
Note 2
(Operation clock to be set by the CKSmn bit of the SMRmn register.
n: Channel number (n = 0 to 2))
p: CSI number (p = 00, 01, 10, 20), g: PIM number (g = 1, 7), x: POM number (x = 1, 7, 8)
f
MCK
: Serial array unit operation clock frequency
t
t
t
t
t
t
KCY2
KH2
KL2
SIK2
KSI2
KSO2
Symbol
,
DD
= EV
4.0 V ≤ V
2.7 V ≤ V
4.0 V
1.8 V ≤ V
2.7 V
C = 30
pF
DD
Note 4
≤ 5.5 V, V
DD
DD
DD
4.0 V ≤ V
2.7 V ≤ V
1.8 V ≤ V
≤ 5.5 V
<
<
Conditions
SS
16 MHz < f
f
16 MHz < f
f
MCK
MCK
= EV
DD
DD
DD
≤ 16 MHz
≤ 16 MHz
= EV
= EV
= EV
SS
DD
DD
DD
= AVss = 0 V)
MCK
MCK
CHAPTER 31 ELECTRICAL SPECIFICATIONS
< 4.0 V
< 2.7 V
≤ 5.5 V
1/f
t
6/f
8/f
6/f
8/f
6/f
KCY2
MIN.
MCK
80
MCK
MCK
MCK
MCK
MCK
+50
/2
TYP.
m: Unit number (m = 0, 1),
2/f
2/f
2/f
MAX.
MCK
MCK
MCK
+125
+45
+57
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
908