UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 421

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
(7) AV
(8) Interrupt request flag (ADIF)
(9) Conversion results just after A/D conversion start
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Remark 78K0R/LF3:
A series resistor string of several tens of kΩ is connected between the AV
Therefore, if the output impedance of the reference voltage supply is high, this will result in a series connection to the
series resistor string between the AV
error of A/D converter.
The interrupt request flag (ADIF) is not cleared even if the analog input channel specification register (ADS) is
changed.
Therefore, if an analog input pin is changed during A/D conversion, the A/D conversion result and ADIF for the pre-
change analog input may be set just before the ADS rewrite. Caution is therefore required since, at this time, when
ADIF is read immediately after the ADS rewrite, ADIF is set despite the fact A/D conversion for the post-change
analog input has not ended.
When A/D conversion is stopped and then resumed, clear ADIF before the A/D conversion operation is resumed.
The first A/D conversion value immediately after A/D conversion starts may not fall within the rating range if the ADCS
bit is set to 1 within 1
measures such as polling the A/D conversion end interrupt request (INTAD) and removing the first conversion result.
A/D conversion
REFP
pin input impedance
78K0R/LG3, 78K0R/LH3:
ADCR
ADIF
ADS rewrite
(start of ANIn conversion)
Figure 10-27. Timing of A/D Conversion End Interrupt Request Generation
μ
s after the ADCE bit was set to 1, or if the ADCS bit is set to 1 with the ADCE bit = 0. Take
ANIn
n = 0 to 6, 15, m = 0 to 6, 15
n = 0 to 10, 15, m = 0 to 10, 15
REFP
and AV
ADS rewrite
(start of ANIm conversion)
ANIn
ANIn
REFM
(or AV
SS
) pins, resulting in a large reference voltage (AV
ANIm
ANIn
REFP
ADIF is set but ANIm conversion
has not ended.
and AV
CHAPTER 10 A/D CONVERTER
REFM
ANIm
ANIm
(or AV
SS
) pins.
ANIm
REF
421
)