UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 722

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
without via CPU.
between the SFR and internal RAM, and therefore, a large capacity of data can be processed. In addition, real-time
control using communication, timer, and A/D can also be realized.
18.1 Functions of DMA Controller
√: Supported, −: Not supported
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
A/D converter
Timer array
unit 0
Serial array
unit 0
Serial array
unit 1
The DMA (Direct Memory Access) controller is mounted onto all 78K0R/Lx3 microcontroller products.
Data can be automatically transferred between the peripheral hardware supporting DMA, SFRs, and internal RAM
As a result, the normal internal operation of the CPU and data transfer can be executed in parallel with transfer
Number of DMA channels: 2
Transfer unit: 8 or 16 bits
Maximum transfer unit: 1024 times
Transfer type:
Transfer mode: Single-transfer mode
Transfer target: Between SFR and internal RAM
Transfer request: Selectable from the following peripheral hardware interrupts
Peripheral hardware
Channel 0
Channel 1
Channel 4
Channel 5
CSI00
CSI01
CSI10
UART0
UART1
IIC10
UART3
2-cycle transfer (One transfer is processed in 2 clocks and the CPU stops during that
processing.)
(
μ
PD78F150nA: n = 0 to 2)
CHAPTER 18 DMA CONTROLLER
78K0R/LF3
80 pins
−
−
√
−
√
√
√
√
√
√
√
√
(
μ
PD78F150nA: n = 3 to 5)
78K0R/LG3
100 pins
√
√
√
√
√
−
√
√
√
√
√
√
CHAPTER 18 DMA CONTROLLER
(
μ
PD78F150nA: n = 6 to 8)
78K0R/LH3
128 pins
√
√
√
√
√
√
√
√
√
√
√
√
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