UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 243

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
(3) Example of setting procedure when stopping the internal high-speed oscillation clock
<2> Setting the internal high-speed oscillation clock as the source clock of the CPU/peripheral hardware clock
The internal high-speed oscillation clock can be stopped in the following two ways.
• Executing the STOP instruction
• Setting HIOSTOP to 1
(a) To execute a STOP instruction
<1> Setting of peripheral hardware
<2> Setting the X1 clock oscillation stabilization time after STOP mode is released
<3> Executing the STOP instruction
Note Setting is prohibited when f
Caution If switching the CPU/peripheral hardware clock from the high-speed system clock to the
and setting the division ratio of the set clock (CKC register)
MCM0
Stop peripheral hardware that cannot be used in the STOP mode (for peripheral hardware that cannot be
used in STOP mode, see CHAPTER 21 STANDBY FUNCTION).
If the X1 clock oscillates before the STOP mode is entered, set the value of the OSTS register before
executing the STOP instruction.
When the STOP instruction is executed, the system is placed in the STOP mode and internal high-speed
oscillation clock is stopped.
0
If the switching is made immediately after the internal high-speed oscillation clock is
internal high-speed oscillation clock after restarting the internal high-speed oscillation
clock, do so after 10
restarted, the accuracy of the internal high-speed oscillation cannot be guaranteed for 10
MDIV2
0
0
0
0
1
1
MDIV1
0
0
1
1
0
0
μ
IH
s or more have elapsed.
= 1 MHz.
MDIV0
0
1
0
1
0
1
f
f
f
f
f
f
IH
IH
IH
IH
IH
IH
/2
/2
/2
/2
/2
2
3
4
5
Note
Note
Selection of CPU/Peripheral
Hardware Clock (f
CHAPTER 5 CLOCK GENERATOR
CLK
)
243
μ
s.

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