HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 114

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

4.2
4.2.1
A reset has the highest exception priority.
When the RES pin goes low, all processing halts and the H8S/2345 Series enters the reset state. A
reset initializes the internal state of the CPU and the registers of on-chip supporting modules.
Immediately after a reset, interrupt control mode 0 is set.
Reset exception handling begins when the RES pin changes from low to high.
The level of the NMI pin at reset determines whether the type of reset is a power-on reset or a
manual reset.
The H8S/2345 Series can also be reset by overflow of the watchdog timer. For details see section
11, Watchdog Timer.
4.2.2
A reset can be of either of two types: a power-on reset or a manual reset. Reset types are shown in
table 4.3. A power-on reset should be used when powering on.
The internal state of the CPU is initialized by either type of reset. A power-on reset also initializes
all the registers in the on-chip supporting modules, while a manual reset initializes all the registers
in the on-chip supporting modules except for the bus controller and I/O ports, which retain their
previous states.
With a manual reset, since the on-chip supporting modules are initialized, ports used as on-chip
supporting module I/O pins are switched to I/O ports controlled by DDR and DR.
Table 4.3
Type
Power-on reset
Manual reset
A reset caused by the watchdog timer can also be of either of two types: a power-on reset or a
manual reset.
94
Reset
Overview
Reset Types
Reset Types
NMI
High
Low
Reset Transition
Conditions
RES
Low
Low
CPU
Initialized
Initialized
On-Chip Supporting Modules
Initialized
Initialized, except for bus controller
and I/O ports
Internal State