HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 841

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

TCR0—Time Control Register 0
TCR1—Time Control Register 1
832
Bit
Initial value
Read/Write
:
:
:
Compare Match Interrupt Enable B
CMIEB
R/W
0
1
7
0
CMFB interrupt requests (CMIB) are disabled
CMFB interrupt requests (CMIB) are enabled
Compare Match Interrupt Enable A
CMIEA
R/W
0
1
6
0
CMFA interrupt requests (CMIA) are disabled
CMFA interrupt requests (CMIA) are enabled
Timer Overflow Interrupt Enable
OVIE
R/W
0
1
5
0
OVF interrupt requests (OVI) are disabled
OVF interrupt requests (OVI) are enabled
CCLR1
Counter Clear
R/W
4
0
0
1
0
1
0
1
CCLR0
R/W
3
0
Clear is disabled
Clear by compare match A
Clear by compare match B
Clear by rising edge of external reset input
Note: *
CKS2
R/W
Clock Select
0
1
2
0
H'FFB0
H'FFB1
If the count input of channel 0 is the TCNT1 overflow
signal and that of channel 1 is the TCNT0 compare
match signal, no incrementing clock is generated.
Do not use this setting.
0
1
0
1
CKS1
R/W
1
0
0
1
0
1
0
1
0
1
Internal clock: counted at falling edge
of ø/8
Internal clock: counted at falling edge
of ø/64
Internal clock: counted at falling edge
of ø/8192
External clock: counted at rising edge
External clock: counted at falling edge
External clock: counted at both rising and
falling edges
Clock input disabled
For channel 0:
Count at TCNT1 overflow signal*
For channel 1:
Count at TCNT0 compare match A*
CKS0
R/W
0
0
8-Bit Timer Channel 0
8-Bit Timer Channel 1