HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 330

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

9.2.5
The TSR registers are 8-bit registers that indicate the status of each channel. The TPU has six TSR
registers, one for each channel. The TSR registers are initialized to H'C0 by a reset, and in
hardware standby mode.
Bit 7—Count Direction Flag (TCFD): Status flag that shows the direction in which TCNT
counts in channels 1, 2, 4, and 5.
In channels 0 and 3, bit 7 is reserved. It is always read as 1 and cannot be modified.
Bit 7
TCFD
0
1
Bit 6—Reserved: Read-only bit, always read as 1.
Channel 0: TSR0
Channel 3: TSR3
Bit
Initial value
R/W
Note: * Can only be written with 0 for flag clearing.
Channel 1: TSR1
Channel 2: TSR2
Channel 4: TSR4
Channel 5: TSR5
Bit
Initial value
R/W
Note: * Can only be written with 0 for flag clearing.
Timer Status Register (TSR)
Description
TCNT counts down
TCNT counts up
:
:
:
:
:
:
TCFD
—
—
R
7
1
7
1
—
—
—
—
6
1
6
1
R/(W)*
TCFU
—
—
5
0
5
0
R/(W)*
R/(W)*
TCFV
TCFV
4
0
4
0
R/(W)*
TGFD
—
—
3
0
3
0
R/(W)*
TGFC
—
—
2
0
2
0
R/(W)*
R/(W)*
TGFB
TGFB
1
0
1
0
(Initial value)
R/(W)*
R/(W)*
TGFA
TGFA
0
0
0
0
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