HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 459

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Serial data transmission (asynchronous mode)
Figure 12.5 shows a sample flowchart for serial transmission.
The following procedure should be used for serial data transmission.
and clear TDRE flag in SSR to 0
Write transmit data to TDR
Read TDRE flag in SSR
Read TEND flag in SSR
Clear TE bit in SCR to 0
All data transmitted?
Start transmission
Clear DR to 0 and
Break output?
set DDR to 1
Initialization
TEND= 1
TDRE=1
<End>
Figure 12.5 Sample Serial Transmission Flowchart
Yes
Yes
Yes
Yes
No
No
No
No
[1]
[2]
[3]
[4]
[1] SCI initialization:
[2] SCI status check and transmit data
[3] Serial transmission continuation
[4] Break output at the end of serial
The TxD pin is automatically
designated as the transmit data
output pin.
After the TE bit is set to 1, a frame
of 1s is output, and transmission is
enabled.
write:
Read SSR and check that the
TDRE flag is set to 1, then write
transmit data to TDR and clear the
TDRE flag to 0.
procedure:
To continue serial transmission,
read 1 from the TDRE flag to
confirm that writing is possible,
then write data to TDR, and then
clear the TDRE flag to 0. Checking
and clearing of the TDRE flag is
automatic when the DTC is
activated by a transmit data empty
interrupt (TXI) request, and date is
written to TDR.
transmission:
To output a break in serial
transmission, set DDR for the port
corresponding to the TxD pin to 1,
clear DR to 0, then clear the TE bit
in SCR to 0.
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