HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 551
HD6412340
Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6412340.pdf
(907 pages)
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17.2.2
Enabling or disabling of part of the H8S/2345’s on-chip ROM area can be selected by means of
the EAE bit in BCRL. For details of the other bits in BCRL, see 6.2.5, Bus Control Register L.
Bit 5—External Address Enable (EAE): Selects whether addresses H'010000 to H'01FFFF are
to be internal addresses or external addresses.
Bit 5
EAE
0
1
Note: * Reserved areas should not be accessed.
17.3
The on-chip ROM is connected to the CPU by a 16-bit data bus, and both byte and word data can
be accessed in one state. Even addresses are connected to the upper 8 bits, and odd addresses to
the lower 8 bits. Word data must start at an even address.
The on-chip ROM is enabled and disabled by setting the mode pins (MD
EAE in BCRL. These settings are shown in tables 17.2 and 17.3.
Bit
Initial value :
R/W
Bus Control Register L (BCRL)
Operation
Description
Addresses H'010000 to H'01FFFF are in on-chip ROM (H8S/2345).
Addresses H'010000 to H'017FFF are in on-chip ROM and addresses H'018000 to
H'01FFFF are a reserved area (in the H8S/2344).
Addresses H'010000 to H'01FFFF are a reserved area (in the H8S/2343 and
H8S/2341).
Addresses H'010000 to H'01FFFF are external addresses (external expansion mode)
or a reserved area* (single-chip mode).
:
:
BRLE
R/W
7
0
R/W
—
6
0
EAE
R/W
5
1
R/W
—
4
1
R/W
—
3
1
R/W
—
2
1
2
, MD
1
, and MD
R/W
—
1
0
(Initial value)
0
) and bit
WAITE
R/W
0
0
539
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