HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 631

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Bit 7—ø Clock Output Disable (PSTOP): Controls ø output.
Bit 7
PSTOP
0
1
Bits 6—Reserved: This bit can be read or written to, but only 0 should be written.
Bits 5 to 3—Reserved: Read-only bits, always read as 0.
Bits 2 to 0—System Clock Select (SCK2 to SCK0): These bits select the clock for the bus
master.
Bit 2
SCK2
0
1
19.2.3
MSTPCR is a 16-bit readable/writable register that performs module stop mode control.
MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit
Initial value
R/W
Bit 1
SCK1
0
1
0
1
Module Stop Control Register (MSTPCR)
Normal Operating
Mode
ø output (initial value)
Fixed high
:
:
:
R/W
15
0
Bit 0
SCK0
0
1
0
1
0
1
—
R/W
14
0
R/W
13
1
Description
Bus master in high-speed mode
Medium-speed clock is ø/2
Medium-speed clock is ø/4
Medium-speed clock is ø/8
Medium-speed clock is ø/16
Medium-speed clock is ø/32
—
MSTPCRH
R/W
12
1
Sleep Mode
ø output
Fixed high
R/W
11
1
R/W
10
1
R/W
Description
9
1
R/W
Software Standby
Mode
Fixed high
Fixed high
8
1
R/W
7
1
R/W
6
1
R/W
5
1
MSTPCRL
R/W
4
1
Hardware Standby
Mode
High impedance
High impedance
R/W
3
1
R/W
2
1
(Initial value)
R/W
1
1
R/W
621
0
1