HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 620

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HD6412340

Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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18.1
The H8S/2345 Series has a built-in clock pulse generator (CPG) that generates the system clock
(ø), the bus master clock, and internal clocks.
The clock pulse generator consists of an oscillator circuit, a duty adjustment circuit, a medium-
speed clock divider, and a bus master clock selection circuit.
18.1.1
Figure 18.1 shows a block diagram of the clock pulse generator.
18.1.2
The clock pulse generator is controlled by SCKCR. Table 18.1 shows the register configuration.
Table 18.1 Clock Pulse Generator Register
Name
System clock control register
Note:* Lower 16 bits of the address.
EXTAL
XTAL
Overview
Block Diagram
Register Configuration
Oscillator
Figure 18.1 Block Diagram of Clock Pulse Generator
Section 18 Clock Pulse Generator
adjustment
circuit
Abbreviation
SCKCR
Duty
System clock to ø pin
Medium-
divider
speed
R/W
R/W
Internal clock
to supporting
modules
ø/2 to ø/32
Initial Value
H'00
Bus master
selection
SCKCR
circuit
clock
Bus master clock
to CPU and DTC
SCK2 to SCK0
Address*
H'FF3A
609

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