HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 523

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Group
Selection
CH2
0
1
14.2.3
ADCR is an 8-bit readable/writable register that enables or disables external triggering of A/D
conversion operations.
ADCR is initialized to H'3F by a reset, and in standby mode or module stop mode.
Bits 7 and 6—Timer Trigger Select 1 and 0 (TRGS1, TRGS0): Select enabling or disabling of
the start of A/D conversion by a trigger signal. Only set bits TRGS1 and TRGS0 while conversion
is stopped.
Bit 7
TRGS1
0
1
Bits 5 to 0—Reserved: These bits are reserved; write as 1 in a write.
510
Bit
Initial value
R/W
A/D Control Register (ADCR)
Bit 6
TRGS0
0
1
0
1
:
:
:
CH1
0
1
0
1
TRGS1
Channel Selection
R/W
7
0
Description
A/D conversion start by external trigger is disabled
A/D conversion start by external trigger (TPU) is enabled
A/D conversion start by external trigger (8-bit timer) is enabled
A/D conversion start by external trigger pin (ADTRG) is enabled
TRGS0
R/W
CH2
0
1
0
1
0
1
0
1
6
0
—
—
5
1
Single Mode
AN0 (Initial value)
AN1
AN2
AN3
AN4
AN5
AN6
AN7
—
—
4
1
R/W
—
3
1
Description
—
—
2
1
Scan Mode
AN0
AN0, AN1
AN0 to AN2
AN0 to AN3
AN4
AN4, AN5
AN4 to AN6
AN4 to AN7
—
—
1
1
(Initial value)
—
—
0
1