HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 494

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

13.2.3
Bit 7 of SMR has a different function in smart card interface mode.
Bit 7—GSM Mode (GM): Sets the smart card interface function to GSM mode.
This bit is cleared to 0 when the normal smart card interface is used. In GSM mode, this bit is set
to 1, the timing of setting of the TEND flag that indicates transmission completion is advanced
and clock output control mode addition is performed. The contents of the clock output control
mode addition are specified by bits 1 and 0 of the serial control register (SCR).
Bit 7
GM
0
1
Note: etu: Elementary time unit (time for transfer of 1 bit)
Bits 6 to 0—Operate in the same way as for the normal SCI.
For details, see section 12.2.5, Serial Mode Register (SMR).
480
Bit
Initial value
Set value*
R/W
Note: * When the smart card interface is used, be sure to make the 0 or 1 setting shown for
bits 6, 5, 3, and 2.
Serial Mode Register (SMR)
Description
Normal smart card interface mode operation
GSM mode smart card interface mode operation
:
:
:
:
TEND flag generation 12.5 etu after beginning of start bit
Clock output ON/OFF control only
TEND flag generation 11.0 etu after beginning of start bit
High/low fixing control possible in addition to clock output ON/OFF control (set by
SCR)
R/W
GM
GM
7
0
CHR
R/W
6
0
0
R/W
PE
5
0
1
R/W
O/E
O/E
4
0
STOP
R/W
3
0
1
R/W
MP
2
0
0
CKS1
CKS1
R/W
1
0
(Initial value)
CKS0
CKS0
R/W
0
0