HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 636

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

19.6.3
Bits STS2 to STS0 in SBYCR should be set as described below.
Using a Crystal Oscillator: Set bits STS2 to STS0 so that the standby time is at least 8 ms (the
oscillation stabilization time).
Table 19.4 shows the standby times for different operating frequencies and settings of bits STS2 to
STS0.
Table 19.4 Oscillation Stabilization Time Settings
STS2 STS1 STS0 Standby Time
0
1
Note: * Not used on the F-ZTAT version.
Using an External Clock: Any value can be set. Normally, use of the minimum time is
recommended.
Note: * The 16-state standby time cannot be used in the F-ZTAT version; a standby time of 8192
19.6.4
Figure 19.2 shows an example in which a transition is made to software standby mode at the
falling edge on the NMI pin, and software standby mode is cleared at the rising edge on the NMI
pin.
In this example, an NMI interrupt is accepted with the NMIEG bit in SYSCR cleared to 0 (falling
edge specification), then the NMIEG bit is set to 1 (rising edge specification), the SSBY bit is set
to 1, and a SLEEP instruction is executed, causing a transition to software standby mode.
626
: Recommended time setting
0
1
0
1
states or longer should be used.
Setting Oscillation Stabilization Time after Clearing Software Standby Mode
Software Standby Mode Application Example
0
1
0
1
0
1
0
1
8192 states
16384 states
32768 states
65536 states
131072 states
262144 states
Reserved
16 states*
20
MHz
0.41 0.51 0.68 0.8
0.82 1.0
1.6
3.3
6.6
—
0.8
13.1 16.4 21.8 26.2 32.8 43.6 65.6 131.2
16
MHz
2.0
4.1
—
1.0
8.2
12
MHz
1.3
2.7
5.5
—
1.3
10.9 13.1 16.4 21.8 32.8 65.5
10
MHz
1.6
3.3
6.6
—
1.6
8
MHz
1.0
2.0
4.1
—
2.0
8.2
6
MHz
1.3
2.7
5.5
—
2.7
10.9 16.4 32.8
4
MHz
2.0
4.1
—
4.0
8.2 16.4
2
MHz Unit
4.1
—
8.0
8.2
ms
—
s