HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 144

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

5.4.5
The H8S/2345 Series is capable of fast word transfer instruction to on-chip memory, and the
program area is provided in on-chip ROM and the stack area in on-chip RAM, enabling high-
speed processing.
Table 5.9 shows interrupt response times - the interval between generation of an interrupt request
and execution of the first instruction in the interrupt handling routine. The execution status
symbols used in table 5.9 are explained in table 5.10.
Table 5.9
No.
1
2
3
4
5
6
Total (using on-chip memory)
Notes: 1. Two states in case of internal interrupt.
Table 5.10 Number of States in Interrupt Handling Routine Execution Statuses
Symbol
Instruction fetch
Branch address read
Stack manipulation
Legend
m
Execution Status
Interrupt priority determination *
Number of wait states until executing
instruction ends *
PC, CCR, EXR stack save
Vector fetch
Instruction fetch *
Internal processing *
: Number of wait states in an external device access.
2. Refers to MULXS and DIVXS instructions.
3. Prefetch after interrupt acceptance and interrupt handling routine prefetch.
4. Internal processing after interrupt acceptance and internal processing after vector fetch.
5. ZTAT, mask ROM, and ROMless versions only.
Interrupt Response Times
Interrupt Response Times
2
3
4
S
S
S
I
J
K
Internal
Memory
1
1
INTM1 = 0
3
1 to
19+2·S
2·S
S
2·S
2
11 to 31
I
K
I
8 Bit Bus
2-State
Access
4
Normal Mode *
I
INTM1 = 1
3
1 to
19+2·S
3·S
S
2·S
2
12 to 32
Object of Access
I
3-State
Access
6+2m
K
I
5
I
External Device
INTM1 = 0
3
1 to
19+2·S
2·S
2·S
2·S
2
12 to 32
16 Bit Bus
2-State
Access
2
K
I
I
Advanced Mode
I
INTM1 = 1
3
1 to
19+2·S
3·S
2·S
2·S
2
13 to 33
3-State
Access
3+m
K
I
I
I
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