HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 37

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Table 1.3
Type
Interrupts
Address bus
Data bus
Bus control
Pin Functions (cont)
Symbol
NMI
IRQ7 to
IRQ0
A
A
D
D
CS3 to
CS0
AS
RD
HWR
LWR
WAIT
23
0
15
0
to
to
FP-100B,
TFP-100B,
TFP-100G FP-100A
63
94, 93,
13, 12,
73 to 76
2, 1,
100, 99,
53 to 50,
48 to 41,
39 to 32
30 to 19,
17 to 14
94 to 97
70
71
72
73
74
Pin No.
65
96, 95,
15, 14,
75 to 78
4 to 1,
55 to 52,
50 to 43,
41 to 34
32 to 21,
19 to 16
96 to 99
72
73
74
75
76
I/O
Input
Input
Output Address bus: These pins output an
I/O
Output Chip select: Signals for selecting
Output Address strobe: When this pin is low,
Output Read: When this pin is low, it
Output High write: A strobe signal that writes
Output Low write: A strobe signal that writes
Input
Name and Function
Nonmaskable interrupt: Requests a
nonmaskable interrupt. When this pin
is not used, it should be fixed high.
Interrupt request 7 to 0: These pins
request a maskable interrupt.
address.
Data bus: These pins constitute a
bidirectional data bus.
areas 3 to 0.
it indicates that address output on the
address bus is enabled.
indicates that the external address
space can be read.
to external space and indicates that
the upper half (D
bus is enabled.
to external space and indicates that
the lower half (D
bus is enabled.
Wait: Requests insertion of a wait
state in the bus cycle when
accessing external 3-state address
space.
7
15
to D
to D
0
) of the data
8
) of the data
17