HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 121

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HD6412340

Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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4.7
When accessing word data or longword data, the H8S/2345 Series assumes that the lowest address
bit is 0. The stack should always be accessed by word transfer instruction or longword transfer
instruction, and the value of the stack pointer (SP, ER7) should always be kept even. Use the
following instructions to save registers:
Use the following instructions to restore registers:
Setting SP to an odd value may lead to a malfunction. Figure 4.6 shows an example of what
happens when the SP value is odd.
PUSH.W
PUSH.L
POP.W
POP.L
SP
Notes on Use of the Stack
Note: This diagram illustrates an example in which the interrupt control mode
Legend
SP set to H'FFFEFF
is 0, in advanced mode.
Rn
ERn
Rn
ERn
TRAP instruction executed
CCR: Condition code register
PC:
R1L: General register R1L
SP:
Figure 4.6 Operation when SP Value is Odd
(or MOV.W Rn, @-SP)
(or MOV.L ERn, @-SP)
(or MOV.W @SP+, Rn)
(or MOV.L @SP+, ERn)
Stack pointer
Program counter
SP
Data saved above SP
CCR
PC
MOV.B R1L, @–ER7
SP
Contents of CCR lost
R1L
PC
H'FFFEFA
H'FFFEFB
H'FFFEFC
H'FFFEFD
H'FFFEFF
101

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