HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 85

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

2.9
2.9.1
The CPU is driven by a system clock, denoted by the symbol ø. The period from one rising edge
of ø to the next is referred to as a "state." The memory cycle or bus cycle consists of one, two, or
three states. Different methods are used to access on-chip memory, on-chip supporting modules,
and the external address space.
2.9.2
On-chip memory is accessed in one state. The data bus is 16 bits wide, permitting both byte and
word transfer instruction. Figure 2.17 shows the on-chip memory access cycle. Figure 2.18 shows
the pin states.
Basic Timing
Overview
On-Chip Memory (ROM, RAM)
ø
Internal address bus
Read
access
Write
access
Internal read signal
Internal data bus
Internal write signal
Internal data bus
Figure 2.17 On-Chip Memory Access Cycle
Bus cycle
Address
T1
Read data
Write data
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