HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 199

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HD6412340

Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Bit n—DTC Activation Enable (DTCEn)
Bit n
DTCEn
0
1
A DTCE bit can be set for each interrupt source that can activate the DTC. The correspondence
between interrupt sources and DTCE bits is shown in table 7.4, together with the vector number
generated for each interrupt controller.
7.2.8
DTVECR is an 8-bit readable/writable register that enables or disables DTC activation by
software, and sets a vector number for the software activation interrupt.
DTVECR is initialized to H'00 by a reset and in hardware standby mode.
Bit 7—DTC Software Activation Enable (SWDTE): Enables or disables DTC activation by
software.
When clearing the SWDTE bit to 0 by software, write 0 to SWDTE after reading SWDTE set to 1.
Note: *
Bit
Initial value
R/W
DTC Vector Register (DTVECR)
A value of 1 can always be written to the SWDTE bit, but 0 can only be written after 1
is read.
Description
DTC activation by this interrupt is disabled
[Clearing conditions]
DTC activation by this interrupt is enabled
[Holding condition]
When the DISEL bit is 0 and the specified number of transfers have not ended
:
:
:
When the DISEL bit is 1 and the data transfer has ended
When the specified number of transfers have ended
SWDTE
R/(W)*
7
0
DTVEC6
R/W
6
0
DTVEC5
R/W
5
0
DTVEC4
R/W
4
0
DTVEC3
R/W
3
0
DTVEC2
R/W
2
0
DTVEC1
R/W
1
0
(Initial value)
DTVEC0
(n = 7 to 0)
R/W
0
0
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