HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 280

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

When a PEDDR bit is cleared to 0 (input port setting) when 8-bit bus mode is selected in mode 1,
2, 4, 5, or 6*, or in mode 3 or 7*, setting the corresponding PEPCR bit to 1 turns on the MOS
input pull-up for the corresponding pin.
PEPCR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its
prior state after a manual reset, and in software standby mode.
8.10.3
Modes 1, 2, 4, 5, and 6*: In modes 1, 2, 4, 5, and 6*, when 8-bit access is designated and 8-bit
bus mode is selected, port E pins are automatically designated as I/O ports. Setting a PEDDR bit
to 1 makes the corresponding port E pin an output port, while clearing the bit to 0 makes the pin
an input port.
When 16-bit bus mode is selected, the input/output direction specification by PEDDR is ignored,
and port E is designated for data I/O.
Port E pin functions in modes 1, 2, 4, 5, and 6 are shown in figure 8.21.
Modes 3 and 7*: In modes 3 and 7*, port E pins function as I/O ports. Input or output can be
specified for each pin on a bit-by-bit basis. Setting a PEDDR bit to 1 makes the corresponding port
E pin an output port, while clearing the bit to 0 makes the pin an input port.
Note: * Modes 1 to 3 are not available on the F-ZTAT version.
Modes 2, 3, 6, and 7 are not available on the ROMless version.
Pin Functions
Figure 8.21 Port E Pin Functions (Modes 1, 2, 4, 5, and 6)*
Port E
8-bit bus mode
PE
PE
PE
PE
PE
PE
PE
PE
7
6
5
4
3
2
1
0
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
16-bit bus mode
D
D
D
D
D
D
D
D
7
6
5
4
3
2
1
0
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
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