HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 122

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HD6412340

Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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5.1
5.1.1
The H8S/2345 Series controls interrupts by means of an interrupt controller. The interrupt
controller has the following features:
Two interrupt control modes
Priorities settable with IPR
Independent vector addresses
Nine external interrupts
DTC control
Any of two interrupt control modes can be set by means of the INTM1 and INTM0 bits in
An interrupt priority register (IPR) is provided for setting interrupt priorities. Eight priority
NMI is assigned the highest priority level of 8, and can be accepted at all times.
All interrupt sources are assigned independent vector addresses, making it unnecessary for
NMI is the highest-priority interrupt, and is accepted at all times. Rising edge or falling
Falling edge, rising edge, or both edge detection, or level sensing, can be selected for IRQ7
DTC activation is performed by means of interrupts.
the system control register (SYSCR).
levels can be set for each module for all interrupts except NMI.
the source to be identified in the interrupt handling routine.
edge can be selected for NMI.
to IRQ0.
Overview
Features
Section 5 Interrupt Controller
103

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