HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 14

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HD6412340

Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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10.3 Operation ........................................................................................................................... 381
10.4 Interrupts............................................................................................................................ 386
10.5 Sample Application ........................................................................................................... 387
10.6 Usage Notes ....................................................................................................................... 388
Section 11 Watchdog Timer
11.1 Overview............................................................................................................................ 395
11.2 Register Descriptions......................................................................................................... 398
11.3 Operation ........................................................................................................................... 404
11.4 Interrupts............................................................................................................................ 408
11.5 Usage Notes ....................................................................................................................... 408
viii
10.2.3 Time Constant Registers B0 and B1 (TCORB0, TCORB1) ................................ 375
10.2.4 Time Control Registers 0 and 1 (TCR0, TCR1) .................................................. 375
10.2.5 Timer Control/Status Registers 0 and 1 (TCSR0, TCSR1).................................. 377
10.2.6 Module Stop Control Register (MSTPCR) .......................................................... 380
10.3.1 TCNT Incrementation Timing.............................................................................. 381
10.3.2 Compare Match Timing ....................................................................................... 382
10.3.3 Timing of External RESET on TCNT.................................................................. 384
10.3.4 Timing of Overflow Flag (OVF) Setting.............................................................. 384
10.3.5 Operation with Cascaded Connection .................................................................. 385
10.4.1 Interrupt Sources and DTC Activation................................................................. 386
10.4.2 A/D Converter Activation .................................................................................... 386
10.6.1 Contention between TCNT Write and Clear........................................................ 388
10.6.2 Contention between TCNT Write and Increment ................................................ 389
10.6.3 Contention between TCOR Write and Compare Match ...................................... 390
10.6.4 Contention between Compare Matches A and B ................................................. 391
10.6.5 Switching of Internal Clocks and TCNT Operation............................................. 391
10.6.6 Usage Note ........................................................................................................... 393
11.1.1 Features ................................................................................................................ 395
11.1.2 Block Diagram...................................................................................................... 396
11.1.3 Pin Configuration ................................................................................................. 397
11.1.4 Register Configuration ......................................................................................... 397
11.2.1 Timer Counter (TCNT) ........................................................................................ 398
11.2.2 Timer Control/Status Register (TCSR)................................................................ 398
11.2.3 Reset Control/Status Register (RSTCSR) ............................................................ 400
11.2.4 Notes on Register Access ..................................................................................... 402
11.3.1 Watchdog Timer Operation.................................................................................. 404
11.3.2 Interval Timer Operation...................................................................................... 406
11.3.3 Timing of Setting Overflow Flag (OVF).............................................................. 406
11.3.4 Timing of Setting of Watchdog Timer Overflow Flag (WOVF) ......................... 407
11.5.1 Contention between Timer Counter (TCNT) Write and Increment ..................... 408
11.5.2 Changing Value of CKS2 to CKS0...................................................................... 408
11.5.3 Switching between Watchdog Timer Mode and Interval Timer Mode................ 409
............................................................................................. 395

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