HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 279

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Port E Data Register (PEDR)
PEDR is an 8-bit readable/writable register that stores output data for the port E pins (PE
PEDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior
state after a manual reset, and in software standby mode.
Port E Register (PORTE)
PORTE is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port E pins (PE
If a port E read is performed while PEDDR bits are set to 1, the PEDR values are read. If a port E
read is performed while PEDDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORTE contents are determined by the pin
states, as PEDDR and PEDR are initialized. PORTE retains its prior state after a manual reset, and
in software standby mode.
Port E MOS Pull-Up Control Register (PEPCR)
PEPCR is an 8-bit readable/writable register that controls the MOS input pull-up function
incorporated into port E on an individual bit basis.
262
Bit
Initial value
R/W
Bit
Initial value
R/W
Bit
Initial value
R/W
Note: * Determined by state of pins PE
:
:
:
:
:
:
:
:
:
PE7PCR
PE7DR
R/W
R/W
PE7
—*
7
0
R
7
7
0
PE6PCR
PE6DR
R/W
R/W
PE6
—*
6
0
R
6
6
0
7
to PE
PE5PCR
PE5DR
R/W
PE5
R/W
7
—*
5
0
R
0
5
5
0
) must always be performed on PEDR.
to PE
PE4PCR
0
PE4DR
.
R/W
R/W
PE4
—*
4
0
R
4
4
0
PE3PCR
PE3DR
R/W
PE3
R/W
—*
3
0
R
3
3
0
PE2PCR
PE2DR
R/W
PE2
R/W
—*
2
0
R
2
2
0
PE1PCR
PE1DR
R/W
PE1
R/W
—*
1
0
R
1
1
0
PE0PCR
PE0DR
7
R/W
R/W
PE0
to PE
—*
0
0
R
0
0
0
0
).