HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 248

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HD6412340

Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Port 3 Data Direction Register (P3DDR)
P3DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 3. Bits 7 and 6 are reserved. P3DDR cannot be read; if it is, an undefined value will be
read.
Setting a P3DDR bit to 1 makes the corresponding port 3 pin an output pin, while clearing the bit
to 0 makes the pin an input pin.
P3DDR is initialized to H'00 (bits 5 to 0) by a power-on reset, and in hardware standby mode. It
retains its prior state after a manual reset, and in software standby mode. As the SCI is initialized,
the pin states are determined by the P3DDR and P3DR specifications.
Port 3 Data Register (P3DR)
P3DR is an 8-bit readable/writable register that stores output data for the port 3 pins (P3
Bits 7 and 6 are reserved; they return an undetermined value if read, and cannot be modified.
P3DR is initialized to H'00 (bits 5 to 0) by a power-on reset, and in hardware standby mode. It
retains its prior state after a manual reset, and in software standby mode.
Bit
Initial value
R/W
Bit
Initial value
R/W
:
:
:
:
:
:
Undefined
Undefined
7
7
Undefined
Undefined
6
6
P35DDR
P35DR
R/W
W
5
0
5
0
P34DDR
P34DR
R/W
W
4
0
4
0
P33DDR
P33DR
R/W
W
3
0
3
0
P32DDR
P32DR
R/W
W
2
0
2
0
P31DDR
P31DR
R/W
W
1
0
1
0
P30DDR
5
P30DR
to P3
R/W
W
0
0
0
0
0
231
).

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