MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 1109
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MC9S12G
Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12G.pdf
(1160 pages)
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Conditions are shown in
NUM C
A.7
A.7.1
With each transition of the feedback clock, the deviation from the reference clock is measured and input
voltage to the VCO is adjusted accordingly.The adjustment is done continuously with no abrupt changes
in the VCOCLK frequency. Noise, voltage, temperature and other factors cause slight variations in the
control loop resulting in a clock jitter. This jitter affects the real minimum and maximum clock periods as
illustrated in
Freescale Semiconductor
T
Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated to
25°C using the Arrhenius equation. For additional information on how Freescale defines Typical Data Retention, please refer to
Engineering Bulletin EB618
Spec table quotes typical endurance evaluated at 25°C for this product family. For additional information on how Freescale defines
Typical Endurance, please refer to Engineering Bulletin EB619.
1
2
3
4
5
6
Javg
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
C Data retention at an average junction temperature of T
C Program Flash number of program/erase cycles
C Data retention at an average junction temperature of T
C Data retention at an average junction temperature of T
C Data retention at an average junction temperature of T
C EEPROM number of program/erase cycles (-40°C ≤ Tj ≤ 150°C)
does not exceed 85°C in a typical temperature profile over the lifetime of a consumer, industrial or automotive application.
after up to 10,000 program/erase cycles
(-40°C ≤ Tj ≤ 150°C)
after up to 100,000 program/erase cycles
after up to 10,000 program/erase cycles
after less than 100 program/erase cycles
Phase Locked Loop
Jitter Definitions
Figure
Table A-11
A-3.
unless otherwise noted
Table A-24. NVM Reliability Characteristics
MC9S12G Family Reference Manual, Rev.1.01
Rating
Program Flash Arrays
EEPROM Array
Javg
Javg
Javg
Javg
= 85°C
= 85°C
= 85°C
= 85°C
1
1
1
1
t
t
t
t
Symbol
NVMRET
NVMRET
NVMRET
NVMRET
n
n
FLPE
FLPE
100K
Min
10K
20
10
20
5
100K
500K
100
100
100
100
Typ
Electrical Characteristics
2
2
2
2
3
3
Max
—
—
—
—
—
—
Cycles
Cycles
Years
Years
Years
Years
Unit
1109
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