MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 132

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MC9S12G

Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Port Integration Module (S12GPIMV0)
2.3.1
2.3.2
2.3.3
2.3.4
132
BKGD
PA7-PA0
PB7-PB6
PB5
PB4
PB3
PB2
PB1
PB0
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Pin BKGD
Pins PA7-0
Pins PB7-0
Pins PC7-0
• The BKGD pin is associated with the BDM module in all packages. During reset, the BKGD pin is used
• These pins feature general-purpose I/O functionality only.
• These pins feature general-purpose I/O functionality only.
• 100 LQFP: The XIRQ signal is mapped to this pin when used with the XIRQ interrupt function. The
• Signal priority:
• 100 LQFP: The IRQ signal is mapped to this pin when used with the IRQ interrupt function. If enabled
• Signal priority:
• This pin features general-purpose I/O functionality only.
• 100 LQFP: The ECLKX2 signal is mapped to this pin when used with the external clock function. The
• Signal priority:
• 100 LQFP: The API_EXTCLK signal is mapped to this pin when used with the external clock function.
• Signal priority:
• 100 LQFP: The ECLK signal is mapped to this pin when used with the external clock function. The
• Signal priority:
as MODC input.
interrupt is enabled by clearing the X mask bit in the CPU Condition Code register. The I/O state of the
pin is forced to input level upon the first clearing of the X bit and held in this state even if the bit is set
again. A STOP or WAIT recovery with the X bit set (refer to CPU12/CPU12X Reference Manual) is not
available.
100 LQFP: XIRQ > GPO
(IRQEN=1) the I/O state of the pin is forced to be an input.
100 LQFP: IRQ > GPO
enabled ECLKX2 signal forces the I/O state to an output.
100 LQFP: ECLKX2 > GPO
If the Autonomous Periodic Interrupt clock is enabled and routed here the I/O state is forced to output.
100 LQFP: API_EXTCLK > GPO
enabled ECLK signal forces the I/O state to an output.
100 LQFP: ECLK > GPO
When using AMPM1, AMPP1 or DACU1 please refer to section
“Initialization”.
MC9S12G Family Reference Manual,
Table 2-7. Port
Table 2-6. Port
Table 2-5. Pin BKGD
NOTE
B
A
Pins PB7-0
Pins PA7-0
Rev.1.01
2.6.1,
Freescale Semiconductor

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