MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 341

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

10.3.2.5
This register enables S12CPMU interrupt requests.
Read: Anytime
Write: Anytime
10.3.2.6
This register controls S12CPMU clock selection.
Freescale Semiconductor
0x0038
LOCKIE
UPOSC
OSCIE
OSCIF
Reset
Field
Field
RTIE
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
1
0
7
4
1
W
R
RTIE
Oscillator Interrupt Flag — OSCIF is set to 1 when UPOSC status bit changes. This flag can only be cleared
by writing a 1. Writing a 0 has no effect.If enabled (OSCIE=1), OSCIF causes an interrupt request.
0 No change in UPOSC bit.
1 UPOSC bit has changed.
Oscillator Status Bit — UPOSC reflects the status of the oscillator. Writes have no effect. While UPOSC=0 the
OSCCLK going to the MSCAN module is off. Entering Full Stop Mode UPOSC is cleared.
0 The oscillator is off or oscillation is not qualified by the PLL.
1 The oscillator is qualified by the PLL.
Real Time Interrupt Enable Bit
0 Interrupt requests from RTI are disabled.
1 Interrupt will be requested whenever RTIF is set.
PLL Lock Interrupt Enable Bit
0 PLL LOCK interrupt requests are disabled.
1 Interrupt will be requested whenever LOCKIF is set.
Oscillator Corrupt Interrupt Enable Bit
0 Oscillator Corrupt interrupt requests are disabled.
1 Interrupt will be requested whenever OSCIF is set.
S12CPMU Interrupt Enable Register (CPMUINT)
S12CPMU Clock Select Register (CPMUCLKS)
0
7
Figure 10-8. S12CPMU Interrupt Enable Register (CPMUINT)
= Unimplemented or Reserved
0
0
6
Table 10-3. CPMUFLG Field Descriptions (continued)
MC9S12G Family Reference Manual, Rev.1.01
Table 10-4. CRGINT Field Descriptions
5
0
0
LOCKIE
0
4
Description
Description
S12 Clock, Reset and Power Management Unit (S12CPMU)
0
0
3
2
0
0
OSCIE
0
1
0
0
0
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