MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 345
MC9S12G
Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12G.pdf
(1160 pages)
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10.3.2.8
This register selects the time-out period for the Real Time Interrupt.
The clock source for the RTI is either IRCCLK or OSCCLK depending on the setting of the RTIOSCSEL
bit. In Stop Mode with PSTP=1 (Pseudo Stop Mode) and RTIOSCSEL=1 the RTI continues to run, else
the RTI counter halts in Stop Mode.
Read: Anytime
Write: Anytime
Freescale Semiconductor
0x003B
FM1, FM0
Reset
Field
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
5, 4
W
R
RTDEC
PLL Frequency Modulation Enable Bits — FM1 and FM0 enable frequency modulation on the VCOCLK. This
is to reduce noise emission. The modulation frequency is f
S12CPMU RTI Control Register (CPMURTI)
0
7
Care should be taken to ensure that the bus frequency does not exceed the
specified maximum when frequency modulation is enabled.
RTR6
Figure 10-11. S12CPMU RTI Control Register (CPMURTI)
0
6
MC9S12G Family Reference Manual, Rev.1.01
Table 10-7. CPMUPLL Field Descriptions
Table 10-8. FM Amplitude selection
RTR5
FM1
5
0
0
0
1
1
0
1
0
1
RTR4
NOTE
FM0
0
4
Description
FM Amplitude /
FM off
±1%
±2%
±4%
S12 Clock, Reset and Power Management Unit (S12CPMU)
f
VCO
RTR3
ref
0
3
divided by 16. See
Variation
RTR2
2
0
Table 10-8
RTR1
0
1
for coding.
RTR0
0
0
345
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