MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 591

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MC9S12G

Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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To determine the value of a data bit and to detect noise, recovery logic takes samples at RT8, RT9, and
RT10.
To verify a stop bit and to detect noise, recovery logic takes samples at RT8, RT9, and RT10.
summarizes the results of the stop bit samples.
In
not the beginning of a start bit. The RT clock is reset and the start bit search begins again. The noise flag
is not set because the noise occurred before the start bit was found.
Freescale Semiconductor
Figure 18-22
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Table 18-18
The RT8, RT9, and RT10 samples do not affect start bit verification. If any
or all of the RT8, RT9, and RT10 start bit samples are logic 1s following a
successful start bit verification, the noise flag (NF) is set and the receiver
assumes that the bit is a start bit (logic 0).
the verification samples RT3 and RT5 determine that the first low detected was noise and
RT8, RT9, and RT10 Samples
RT8, RT9, and RT10 Samples
summarizes the results of the data bit samples.
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
MC9S12G Family Reference Manual, Rev.1.01
Table 18-18. Data Bit Recovery
Table 18-19. Stop Bit Recovery
NOTE
Data Bit Determination
Framing Error Flag
0
0
0
1
0
1
1
1
1
1
1
0
1
0
0
0
Serial Communication Interface (S12SCIV5)
Noise Flag
Noise Flag
0
1
1
1
1
1
1
0
0
1
1
1
1
1
1
0
Table 18-19
591

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