MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 668

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

16 KByte Flash Module (S12FTMRG16K1V1)
21.3.2.1
The FCLKDIV register is used to control timed events in program and erase algorithms.
All bits in the FCLKDIV register are readable, bit 7 is not writable, bit 6 is write-once-hi and controls the
writability of the FDIV field in normal mode. In special mode, bits 6-0 are writable any number of times
but bit 7 remains unwritable.
668
FDIVLD
Address
Offset Module Base + 0x0000
Reset
& Name
0x0011
FRSV5
0x0012
FRSV6
0x0013
FRSV7
Field
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
7
W
R
FDIVLD
Clock Divider Loaded
0 FCLKDIV register has not been written since the last reset
1 FCLKDIV register has been written since the last reset
Flash Clock Divider Register (FCLKDIV)
0
7
W
W
W
R
R
R
The FCLKDIV register should never be written while a Flash command is
executing (CCIF=0).
7
0
0
0
FDIVLCK
Figure 21-4. FTMRG16K1 Register Summary (continued)
= Unimplemented or Reserved
0
6
Figure 21-5. Flash Clock Divider Register (FCLKDIV)
= Unimplemented or Reserved
6
0
0
0
MC9S12G Family Reference Manual,
Table 21-7. FCLKDIV Field Descriptions
5
0
5
0
0
0
CAUTION
0
4
Description
4
0
0
0
0
3
FDIV[5:0]
3
0
0
0
Rev.1.01
2
0
2
0
0
0
Freescale Semiconductor
0
1
1
0
0
0
0
0
0
0
0
0