MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 112

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Device Overview MC9S12G-Family
1.12.2
Table 1-28
Chapter 6, “Interrupt Module
the vectors.
112
Vector base + $EC
Vector base + $DA
Vector base + $D8
Vector base + $D4
Vector base + $F8
Vector base + $E2
Vector base+ $DC
Vector base+ $EE
Vector base+ $EA
Vector base+ $DE
Vector base+ $D6
Vector base+ $F6
Vector base+ $F4
Vector base+ $F2
Vector base+ $F0
Vector base+ $E8
Vector base+ $E6
Vector base+ $E4
Vector base+ $E0
Vector Address
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Vector Address
lists all interrupt sources and vectors in the default order of priority. The interrupt module (see
Interrupt Vectors
$FFFE
$FFFE
$FFFE
$FFFE
$FFFC
$FFFA
1
TIM Pulse accumulator A overflow
TIM Pulse accumulator input edge
Unimplemented instruction trap
RTI time-out interrupt
TIM timer channel 0
TIM timer channel 1
TIM timer channel 2
TIM timer channel 3
TIM timer channel 4
TIM timer channel 5
TIM timer channel 6
TIM timer channel 7
Table 1-28. Interrupt Vector Locations (Sheet 1 of 2)
TIM timer overflow
Interrupt Source
Table 1-27. Reset Sources and Vector Locations
(S12SINTV1)”) provides an interrupt vector base register (IVBR) to relocate
XIRQ
SCI0
SCI1
SPI0
MC9S12G Family Reference Manual,
SWI
IRQ
Low Voltage Reset (LVR)
Power-On Reset (POR)
Illegal Address Reset
COP watchdog reset
External pin RESET
Clock monitor reset
Reset Source
2
3
Mask
None
None
CCR
X Bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
SPI0CR1 (SPIE, SPTIE)
(TIE, TCIE, RIE, ILIE)
(TIE, TCIE, RIE, ILIE)
CPMUINT (RTIE)
Mask
None
None
None
None
None
None
IRQCR (IRQEN)
CCR
PACTL (PAOVI)
Local Enable
TSCR2 (TOI)
PACTL (PAI)
Rev.1.01
SCI0CR2
SCI1CR2
TIE (C0I)
TIE (C1I)
TIE (C2I)
TIE (C3I)
TIE (C4I)
TIE (C5I)
TIE (C6I)
TIE (C7I)
None
None
None
OSCE Bit in CPMUOSC register
CR[2:0] in CPMUCOP register
Local Enable
None
None
None
None
Freescale Semiconductor
from STOP
Wake up
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
10.6 Interrupts
-
-
from WAIT
Wakeup
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
-
-